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PostPosted: Thu Nov 04, 2010 7:48 pm 
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Joined: Mon Sep 20, 2010 8:26 pm
Posts: 11
brain wrote:
If there a bit of 8 bit baby or other proto-board stock available, more boards should be easy to make

The 8bb was especially convenient for this because the power conversion circuit was already mostly there. For the price, they're nice prototyping boards.

brain wrote:
(essentially, using a '04 and '10 to create /WR and /RD, and a '06 for IRQ massaging. A rewire might allow cheaper ICs, or fewer

Given that the original parts list was generated by IRC discussions of "Well, what parts DO you have on hand?", there has to be a more optimal configuration. Regardless of the glue logic or design used, as long as they map their boards in indirect mode, (and remember to make the base address dynamic), everyone's work will be cross-compatible.


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PostPosted: Thu Nov 04, 2010 8:36 pm 
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Joined: Sun Feb 10, 2008 6:55 am
Posts: 75
The '00/'04 or '10/'04 config is pretty standard to convert Motorola to Intel signalling methodologies.

Creating a true dynamic base address system when the IC only maps to 4 addresses in memory is tricky if we truly want to be as granular as possible.

My recommendation is to ease the granularity to 16 bytes, and use the same address mapping logic in the 64NIC+. A 4 bit comparator is used to select which 16 byte bank will be used for the base address, and the logic will map the IC into that sub-bank of the IO space.

Jim


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PostPosted: Tue Nov 09, 2010 12:25 pm 
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Joined: Mon Mar 23, 2009 12:11 pm
Posts: 140
Location: Katoomba, Australia
I do have an 8-bit baby floating around somewhere. I'd be willing to have a go at constructing one of these, but I'll need some assistance with the design I think.

Is it possible to get a 'shopping list' of components?


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PostPosted: Wed Nov 10, 2010 1:56 am 
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Joined: Sun Feb 10, 2008 6:55 am
Posts: 75
jonnosan wrote:
I do have an 8-bit baby floating around somewhere. I'd be willing to have a go at constructing one of these, but I'll need some assistance with the design I think.

Is it possible to get a 'shopping list' of components?


1 WIZ811MJ or WIZ812MJ
1 74'10
1 74'04
1 3V3 regulator
2 2x10 .1" female headers

If you want IRQ support:

1 74'06

!RD = !(R * PHI2 * ! (!IO1))
!WR = !(!(!W) * PHI2 * !(!IO1))

Now, if you want to experiment and only have a '00, you could try:

!RD = !(R * PHI2)
!WR = !(!(!W) * PHI2)
!CS = !IO1

!IRQ = !!INT, using two '06 or a '04 followed by a '06 (the last gate must be OC.

Oh, and you need a WIZ5100 manual, and a WIZ811/812 manual

Jim


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PostPosted: Wed Nov 10, 2010 10:46 am 
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Joined: Mon Mar 23, 2009 12:11 pm
Posts: 140
Location: Katoomba, Australia
In the NinjaNet photos I can see a little cluster of resistors and capacitors - do I need those as well?


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PostPosted: Thu Nov 11, 2010 2:59 am 
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Joined: Sun Feb 10, 2008 6:55 am
Posts: 75
jonnosan wrote:
In the NinjaNet photos I can see a little cluster of resistors and capacitors - do I need those as well?


I think those are the 3V3 regulator items, but put a link to the pic, and I will verify.

Jim


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PostPosted: Thu Nov 11, 2010 3:30 am 
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Joined: Mon Sep 20, 2010 8:26 pm
Posts: 11
jonnosan wrote:
In the NinjaNet photos I can see a little cluster of resistors and capacitors - do I need those as well?

Yes. That's the voltage conversion circuit that gives you 3.3 for the wiznet module. You can follow the standard instructions for the 8bb board. That's what I did, anyway.

One thing I've found very useful in early development is the way I can switch IO1 and IO2 on my cart port expander. The NinjaNet proto uses IO1, but I figure any code for this should have a constant for base address. That said, here are some constants I plugged in from the docs (DASM format, using socket bases) The macros at the end are outdated - the current revision works more like Steve Judd's print routine. Below that is a very early version of the telnet client. (Also DASM format) Keep in mind this is the sloppy first-round stuff I did when we first got the protos going back in May. A better lib is forthcoming, but it's not polished enough yet. I'm posting this solely to help anyone who's wanting a leg up on this to get started. I especially advise against using my readblock and writeblock from this code snippet, they're heavily UN-optimized.

wiznet.inc:
Code:
WIZNET_BASE = $DF00
WIZNET_TX_BASE = $4000
WIZNET_RX_BASE = $6000

WIZNET_ADDR_HI = WIZNET_BASE+1
WIZNET_ADDR_LO = WIZNET_BASE+2
WIZNET_DATA =    WIZNET_BASE+3


WIZNET_MR     = $0000 ;Mode Register

WIZNET_GAR0   = $0001 ;Gateway Address Byte 0
WIZNET_GAR1   = $0002 ;Gateway Address Byte 1
WIZNET_GAR2   = $0003 ;Gateway Address Byte 2
WIZNET_GAR3   = $0004 ;Gateway Address Byte 3

WIZNET_SUBR0  = $0005 ;Subnet Mask Address 0
WIZNET_SUBR1  = $0006 ;Subnet Mask Address 1
WIZNET_SUBR2  = $0007 ;Subnet Mask Address 2
WIZNET_SUBR3  = $0008 ;Subnet Mask Address 3

WIZNET_SHAR0  = $0009 ;Local MAC Address 0
WIZNET_SHAR1  = $000A ;Local MAC Address 1
WIZNET_SHAR2  = $000B ;Local MAC Address 2
WIZNET_SHAR3  = $000C ;Local MAC Address 3
WIZNET_SHAR4  = $000D ;Local MAC Address 4
WIZNET_SHAR5  = $000E ;Local MAC Address 5

WIZNET_SIPR0  = $000F ;Source IP Address 0
WIZNET_SIPR1  = $0010 ;Source IP Address 0
WIZNET_SIPR2  = $0011 ;Source IP Address 0
WIZNET_SIPR3  = $0012 ;Source IP Address 0

WIZNET_IR     = $0015 ;Interrupt
WIZNET_IMR    = $0016 ;Interrupt Mask

WIZNET_RTR0   = $0017 ;Retry Time High Byte
WIZNET_RTR1   = $0018 ;Retry Time Low Byte

WIZNET_RCR    = $0019 ;Retry Count

WIZNET_RMSR   = $001A ;RX Memory Size (per socket)
WIZNET_TMSR   = $001B ;TX Memory Size (per socket)

WIZNET_PATR0  = $001C ;PPPoE Auth Type High
WIZNET_PART1  = $001D ;PPPoE Auth Type Low

WIZNET_PTIMER = $0028 ;PPP LCP Request Timer
WIZNET_PMAGIC = $0029 ;PPP LCP Magic Number

WIZNET_UIPR0  = $002A ;Unreachable IP Address 0
WIZNET_UIPR1  = $002B ;Unreachable IP Address 1
WIZNET_UIPR2  = $002C ;Unreachable IP Address 2
WIZNET_UIPR3  = $002D ;Unreachable IP Address 3

WIZNET_UPORT0 = $002E ;Unreachable Port High
WIZNET_UPORT1 = $002F ;Unreachable Port Low


;Socket Registers
WIZNET_S0_BASE    = $0400 ;Base for socket 0
WIZNET_S0_MR      = $0400 ;Socket 0 Mode   
WIZNET_S0_CR      = $0401 ;Socket 0 Command
WIZNET_S0_IR      = $0402 ;Socket 0 Interrupt
WIZNET_S0_SR      = $0403 ;Socket 0 Status
WIZNET_S0_PORT0   = $0404 ;Socket 0 Source Port High
WIZNET_S0_PORT1   = $0405 ;Socket 0 Source Port Low
WIZNET_S0_DHAR0   = $0406 ;Socket 0 Dest Mac 0   
WIZNET_S0_DHAR1   = $0407 ;Socket 0 Dest Mac 1   
WIZNET_S0_DHAR2   = $0408 ;Socket 0 Dest Mac 2   
WIZNET_S0_DHAR3   = $0409 ;Socket 0 Dest Mac 3   
WIZNET_S0_DHAR4   = $040A ;Socket 0 Dest Mac 4   
WIZNET_S0_DHAR5   = $040B ;Socket 0 Dest Mac 5   
WIZNET_S0_DIPR0   = $040C ;Socket 0 Dest IP 0
WIZNET_S0_DIPR1   = $040D ;Socket 0 Dest IP 1
WIZNET_S0_DIPR2   = $040E ;Socket 0 Dest IP 2
WIZNET_S0_DIPR3   = $040F ;Socket 0 Dest IP 3
WIZNET_S0_DPORT0  = $0410 ;Socket 0 Dest Port High
WIZNET_S0_DPORT1  = $0411 ;Socket 0 Dest Port Low
WIZNET_S0_MSSR0   = $0412 ;Socket 0 Max Segment High
WIZNET_S0_MSSR1   = $0413 ;Socket 0 Max Segment Low
WIZNET_S0_PROTO   = $0414 ;Socket 0 Protocol (Raw Mode)
WIZNET_S0_TOS     = $0415 ;Socket 0 IP TOS
WIZNET_S0_TTL     = $0416 ;Socket 0 IP TTL
WIZNET_S0_TX_FSR0 = $0420 ;Socket 0 TX Free Size High
WIZNET_S0_TX_FSR1 = $0421 ;Socket 0 TX Free Size Low
WIZNET_S0_TX_RD0  = $0422 ;Socket 0 TX Read Pointer High
WIZNET_S0_TX_RD1  = $0423 ;Socket 0 TX Read Pointer Low
WIZNET_S0_TX_WR0  = $0424 ;Socket 0 TX Write Pointer High   
WIZNET_S0_TX_WR1  = $0425 ;Socket 0 TX Write Pointer Low   
WIZNET_S0_RX_RSR0 = $0426 ;Socket 0 RX Received Size High
WIZNET_S0_RX_RSR1 = $0427 ;Socket 0 RX Received Size Low
WIZNET_S0_RX_RD0  = $0428 ;Socket 0 RX Read Pointer High
WIZNET_S0_RX_RD1  = $0429 ;Socket 0 RX Read Pointer Low
 
WIZNET_S1_BASE    = $0500 ;Base for socket 1
WIZNET_S1_MR      = $0500 ;Socket 1 Mode   
WIZNET_S1_CR      = $0501 ;Socket 1 Command
WIZNET_S1_IR      = $0502 ;Socket 1 Interrupt
WIZNET_S1_SR      = $0503 ;Socket 1 Status
WIZNET_S1_PORT0   = $0504 ;Socket 1 Source Port High
WIZNET_S1_PORT1   = $0505 ;Socket 1 Source Port Low
WIZNET_S1_DHAR0   = $0506 ;Socket 1 Dest Mac 0   
WIZNET_S1_DHAR1   = $0507 ;Socket 1 Dest Mac 1   
WIZNET_S1_DHAR2   = $0508 ;Socket 1 Dest Mac 2   
WIZNET_S1_DHAR3   = $0509 ;Socket 1 Dest Mac 3   
WIZNET_S1_DHAR4   = $050A ;Socket 1 Dest Mac 4   
WIZNET_S1_DHAR5   = $050B ;Socket 1 Dest Mac 5   
WIZNET_S1_DIPR0   = $050C ;Socket 1 Dest IP 0
WIZNET_S1_DIPR1   = $050D ;Socket 1 Dest IP 1
WIZNET_S1_DIPR2   = $050E ;Socket 1 Dest IP 2
WIZNET_S1_DIPR3   = $050F ;Socket 1 Dest IP 3
WIZNET_S1_DPORT0  = $0510 ;Socket 1 Dest Port High
WIZNET_S1_DPORT1  = $0511 ;Socket 1 Dest Port Low
WIZNET_S1_MSSR0   = $0512 ;Socket 1 Max Segment High
WIZNET_S1_MSSR1   = $0513 ;Socket 1 Max Segment Low
WIZNET_S1_PROTO   = $0514 ;Socket 1 Protocol (Raw Mode)
WIZNET_S1_TOS     = $0515 ;Socket 1 IP TOS
WIZNET_S1_TTL     = $0516 ;Socket 1 IP TTL
WIZNET_S1_TX_FSR0 = $0520 ;Socket 1 TX Free Size High
WIZNET_S1_TX_FSR1 = $0521 ;Socket 1 TX Free Size Low
WIZNET_S1_TX_RD0  = $0522 ;Socket 1 TX Read Pointer High
WIZNET_S1_TX_RD1  = $0523 ;Socket 1 TX Read Pointer Low
WIZNET_S1_TX_WR0  = $0524 ;Socket 1 TX Write Pointer High   
WIZNET_S1_TX_WR1  = $0525 ;Socket 1 TX Write Pointer Low   
WIZNET_S1_RX_RSR0 = $0526 ;Socket 1 RX Received Size High
WIZNET_S1_RX_RSR1 = $0527 ;Socket 1 RX Received Size Low
WIZNET_S1_RX_RD0  = $0528 ;Socket 1 RX Read Pointer High
WIZNET_S1_RX_RD1  = $0529 ;Socket 1 RX Read Pointer Low

WIZNET_S2_BASE    = $0600 ;Base for socket 2
WIZNET_S2_MR      = $0600 ;Socket 2 Mode   
WIZNET_S2_CR      = $0601 ;Socket 2 Command
WIZNET_S2_IR      = $0602 ;Socket 2 Interrupt
WIZNET_S2_SR      = $0603 ;Socket 2 Status
WIZNET_S2_PORT0   = $0604 ;Socket 2 Source Port High
WIZNET_S2_PORT1   = $0605 ;Socket 2 Source Port Low
WIZNET_S2_DHAR0   = $0606 ;Socket 2 Dest Mac 0   
WIZNET_S2_DHAR1   = $0607 ;Socket 2 Dest Mac 1   
WIZNET_S2_DHAR2   = $0608 ;Socket 2 Dest Mac 2   
WIZNET_S2_DHAR3   = $0609 ;Socket 2 Dest Mac 3   
WIZNET_S2_DHAR4   = $060A ;Socket 2 Dest Mac 4   
WIZNET_S2_DHAR5   = $060B ;Socket 2 Dest Mac 5   
WIZNET_S2_DIPR0   = $060C ;Socket 2 Dest IP 0
WIZNET_S2_DIPR1   = $060D ;Socket 2 Dest IP 1
WIZNET_S2_DIPR2   = $060E ;Socket 2 Dest IP 2
WIZNET_S2_DIPR3   = $060F ;Socket 2 Dest IP 3
WIZNET_S2_DPORT0  = $0610 ;Socket 2 Dest Port High
WIZNET_S2_DPORT1  = $0611 ;Socket 2 Dest Port Low
WIZNET_S2_MSSR0   = $0612 ;Socket 2 Max Segment High
WIZNET_S2_MSSR1   = $0613 ;Socket 2 Max Segment Low
WIZNET_S2_PROTO   = $0614 ;Socket 2 Protocol (Raw Mode)
WIZNET_S2_TOS     = $0615 ;Socket 2 IP TOS
WIZNET_S2_TTL     = $0616 ;Socket 2 IP TTL
WIZNET_S2_TX_FSR0 = $0620 ;Socket 2 TX Free Size High
WIZNET_S2_TX_FSR1 = $0621 ;Socket 2 TX Free Size Low
WIZNET_S2_TX_RD0  = $0622 ;Socket 2 TX Read Pointer High
WIZNET_S2_TX_RD1  = $0623 ;Socket 2 TX Read Pointer Low
WIZNET_S2_TX_WR0  = $0624 ;Socket 2 TX Write Pointer High   
WIZNET_S2_TX_WR1  = $0625 ;Socket 2 TX Write Pointer Low   
WIZNET_S2_RX_RSR0 = $0626 ;Socket 2 RX Received Size High
WIZNET_S2_RX_RSR1 = $0627 ;Socket 2 RX Received Size Low
WIZNET_S2_RX_RD0  = $0628 ;Socket 2 RX Read Pointer High
WIZNET_S2_RX_RD1  = $0629 ;Socket 2 RX Read Pointer Low

WIZNET_S3_BASE    = $0700 ;Base for socket 3
WIZNET_S3_MR      = $0700 ;Socket 3 Mode   
WIZNET_S3_CR      = $0701 ;Socket 3 Command
WIZNET_S3_IR      = $0702 ;Socket 3 Interrupt
WIZNET_S3_SR      = $0703 ;Socket 3 Status
WIZNET_S3_PORT0   = $0704 ;Socket 3 Source Port High
WIZNET_S3_PORT1   = $0705 ;Socket 3 Source Port Low
WIZNET_S3_DHAR0   = $0706 ;Socket 3 Dest Mac 0   
WIZNET_S3_DHAR1   = $0707 ;Socket 3 Dest Mac 1   
WIZNET_S3_DHAR2   = $0708 ;Socket 3 Dest Mac 2   
WIZNET_S3_DHAR3   = $0709 ;Socket 3 Dest Mac 3   
WIZNET_S3_DHAR4   = $070A ;Socket 3 Dest Mac 4   
WIZNET_S3_DHAR5   = $070B ;Socket 3 Dest Mac 5   
WIZNET_S3_DIPR0   = $070C ;Socket 3 Dest IP 0
WIZNET_S3_DIPR1   = $070D ;Socket 3 Dest IP 1
WIZNET_S3_DIPR2   = $070E ;Socket 3 Dest IP 2
WIZNET_S3_DIPR3   = $070F ;Socket 3 Dest IP 3
WIZNET_S3_DPORT0  = $0710 ;Socket 3 Dest Port High
WIZNET_S3_DPORT1  = $0711 ;Socket 3 Dest Port Low
WIZNET_S3_MSSR0   = $0712 ;Socket 3 Max Segment High
WIZNET_S3_MSSR1   = $0713 ;Socket 3 Max Segment Low
WIZNET_S3_PROTO   = $0714 ;Socket 3 Protocol (Raw Mode)
WIZNET_S3_TOS     = $0715 ;Socket 3 IP TOS
WIZNET_S3_TTL     = $0716 ;Socket 3 IP TTL
WIZNET_S3_TX_FSR0 = $0720 ;Socket 3 TX Free Size High
WIZNET_S3_TX_FSR1 = $0721 ;Socket 3 TX Free Size Low
WIZNET_S3_TX_RD0  = $0722 ;Socket 3 TX Read Pointer High
WIZNET_S3_TX_RD1  = $0723 ;Socket 3 TX Read Pointer Low
WIZNET_S3_TX_WR0  = $0724 ;Socket 3 TX Write Pointer High   
WIZNET_S3_TX_WR1  = $0725 ;Socket 3 TX Write Pointer Low   
WIZNET_S3_RX_RSR0 = $0726 ;Socket 3 RX Received Size High
WIZNET_S3_RX_RSR1 = $0727 ;Socket 3 RX Received Size Low
WIZNET_S3_RX_RD0  = $0728 ;Socket 3 RX Read Pointer High
WIZNET_S3_RX_RD1  = $0729 ;Socket 3 RX Read Pointer Low


;commands
WIZNET_CMD_OPEN = $01
WIZNET_CMD_LISTEN = $02
WIZNET_CMD_CONNECT = $04
WIZNET_CMD_DISCONNECT = $08
WIZNET_CMD_CLOSE = $10
WIZNET_CMD_SEND = $20
WIZNET_CMD_SEND_MAC = $21
WIZNET_CMD_SEND_KEEP = $22
WIZNET_CMD_RECV = $40

;modes
WIZNET_MODE_TCP = $01
WIZNET_MODE_UDP = $02

;macros
   MAC WIZREG_WRITE   
   lda #>{1}
   sta WIZNET_ADDR_HI
   lda #<{1}
   sta WIZNET_ADDR_LO
   lda {2}   
   sta WIZNET_DATA
   ENDM
   
   MAC WIZREG_WRITEA
   pha
   lda #>{0}
   sta WIZNET_ADDR_HI
   lda #<{0}
   sta WIZNET_ADDR_LO
   pla
   sta WIZNET_DATA
   ENDM

   MAC WIZREG_READ
   lda #>{0}
   sta WIZNET_ADDR_HI
   lda #<{0}
   sta WIZNET_ADDR_LO
   lda WIZNET_DATA
   ENDM
   
   MAC WIZREADNEXT
   lda WIZNET_DATA
   ENDM
   
   MAC WIZWRITENEXT
   lda {0}
   sta WIZNET_DATA
   ENDM


telnet.asm:
Code:
   processor 6502
   org $1000
   include "wiznet.inc"

START:
      lda #$0b
      sta $d020
      lda #$00
      sta $d021
      lda #$01
      sta $0286
      jsr $e544
      
      jsr Reset_Wiznet
      jsr CONFIG_WIZNET_HOST
      
      lda #$03 ;set indirect + autoincrement
      sta WIZNET_BASE

      lda #$00
      sta WIZNET_ADDR_HI
      
      lda #$16
      sta WIZNET_ADDR_LO
      
      ldx #$00
CONFIG_LOOP2:
      lda CONFIG_DATA2,x
      sta WIZNET_DATA
      inx
      cpx #$07
      bne CONFIG_LOOP2
      ;DEBUG
      jsr CONNECT
      jmp INNER_LOOP
      ;DEBUG
      
      ;Show main menu
      ;    Settings
      ;    Connect
      ;    Quit


INNER_LOOP:
      lda CONNECTED
      beq NOTCONNECTED
      jsr POLLANDREAD
NOTCONNECTED:
      jsr $ffe4
      beq INNER_LOOP
      pha
      jsr PROCESSKEY
      bcs NOLOCALECHO ;don't echo controller keys
      ldx LOCALECHO
      cpx #$01
      bne NO_LOCALECHO
      jsr $ffd2
NOLOCALECHO:
      pla
      sta $5020
      
      ldx CONNECTED
      cpx #$01
      bne INNER_LOOP
      
      ;If we're connected, send the char
      jsr SEND_CHAR
      jmp INNER_LOOP


PROCESSKEY:
      cmp #$

;85 89 86 8a  87 8b 88 8c


CONNECT:
      jsr WIZNET_CONNECT_TO_SERVER
      ;Need to replace this with actual connection checking
      lda #$01
      sta CONNECTED
      
      jmp INNER_LOOP
      

POLLANDREAD:
      jsr POLL
      bcc IL1
            
      jsr READ
      jsr ReadBlock
      jsr DoneRead
IL1:
      rts
   
      
SEND_CHAR: ;expect char in A
      pha
      ;inc $d021
      ;get offset
      WIZREG_READ WIZNET_S0_TX_WR0
      sta rsw
      sta $5021
      and #$07
      clc
      adc #$40
      sta TX_PTR
      WIZREG_READ WIZNET_S0_TX_WR1
      sta rsw+1
      sta $5022
      and #$ff
      sta TX_PTR+1
      ldx TX_PTR
      ldy TX_PTR+1
      pla
      jsr Write_Wiznet_Reg
      inc rsw+1
      lda rsw+1
      cmp #$00
      bne IL4
      inc rsw
IL4:
      WIZREG_WRITE WIZNET_S0_TX_WR0,rsw
      WIZREG_WRITE WIZNET_S0_TX_WR1,rsw+1
      WIZREG_WRITE WIZNET_S0_CR,#WIZNET_CMD_SEND
      rts                  
      
      
POLL:   
      lda #$00
      sta Read_Count
      sta Read_Count+1
      WIZREG_READ $0426
      
      sta $5000
      sta Read_Count
       
       WIZREG_READ $0427
      sta Read_Count+1
      sta $5001
      
      lda Read_Count
      bne Data_Ready
      lda Read_Count+1
      bne Data_Ready
POLLX:
      clc
      rts

Data_Ready:
      lda Read_Count
      sta readupdate
      lda Read_Count+1
      sta readupdate+1
      sec
      rts
      

bytesread:   dc.b $00,$00

READ:      
      lda Read_Count
      sta bytesread
      lda Read_Count+1
      sta Read_Count2+1
      sta bytesread+1
      
      ;428,429 are offset
      ; add to 6000

      lda #$60
      sta Read_Base
      lda #$00
      sta Read_Base+1

      WIZREG_READ $0428
      sta $5002
      sta rsr
      and #$07
      
      sta Read_Offset
      sta $5004

      WIZREG_READ $0429
      sta $5003
      sta rsr+1
      sta Read_Offset+1
      sta $5005
SetBase:
      lda Read_Offset+1
      clc
      adc Read_Base+1
      bcc sb0
      inc Read_Base
sb0:
      sta Read_Base+1
      sta $5007
      
      lda Read_Offset
      clc
      adc Read_Base
      sta Read_Base
      sta $5006
      
      lda Read_Base
      sta rboff+2
      lda Read_Base+1
      sta rboff+1

      
      lda #$03
      sta WIZNET_BASE
      lda Read_Base
      sta WIZNET_ADDR_HI
      lda Read_Base+1
      sta WIZNET_ADDR_LO
      rts


      
ReadBlock:
      lda WIZNET_DATA
rboff:      sta $6000
      jsr $ffd2

      inc rboff+1
      bne rb1
      inc rboff+2
rb1:
      dec bytesread+1
      lda bytesread+1
      cmp #$ff
      bne rb2
      dec bytesread
rb2:
      ;have we read all of the data yet?
      lda bytesread+1
      bne rb4
      lda bytesread
      beq ReadEnd
rb4:   
      inc rsr+1
      bne rb3
      inc rsr
rb3:
      ;do we need to wrap?
      lda rboff+2
      cmp #$68
      bne ReadBlock
lock:
   jmp lock
      lda #$60
      sta rboff+2
      sta WIZNET_ADDR_HI
      lda #$00
      sta rboff+1
      sta WIZNET_ADDR_LO
      lda #$03 ;set indirect + autoincrement
      sta WIZNET_BASE

      jmp ReadBlock
ReadEnd:
      inc rsr+1
      bne re0
      inc rsr
re0:
      ;dec rsr+1
      rts

DoneRead:
      lda rsr
      sta $5008
      lda rsr+1
      sta $5009
      
      ldx #$04
      ldy #$28
      lda rsr
      jsr Write_Wiznet_Reg
      lda rsr+1
      ldy #$29
      jsr Write_Wiznet_Reg

      ldx #$04
      ldy #$01
      lda #$40
      jsr Write_Wiznet_Reg
      rts         


Reset_Wiznet:
      lda #$80
      sta WIZNET_BASE
      rts
      
      
Write_Wiznet_Reg: ;Expects address in x:y, byte in a
      stx WIZNET_ADDR_HI
      sty WIZNET_ADDR_LO
      sta WIZNET_DATA
      rts
      
Read_Wiznet_Reg: ;Expects address in x:y, returns byte in a
      stx WIZNET_BASE+1
      sty WIZNET_BASE+2
      lda WIZNET_BASE+3
      rts
      
   include "hostcfg.asm"
   include "open.asm"
      

rsw:   dc.b $00,$00      
readupdate:
      dc.b $00,$00
rsr:   dc.b $00,$00

TX_PTR:      dc.b $00,$00      

LOCALECHO: dc.b $00
CONNECTED: dc.b $00

CONFIG_DATA2:
      dc.b $00,$0f,$a0,$08,$55,$55


;target server details
SERVER_ADDRESS:
      dc.b 81,235,242,146
SERVER_PORT:
      dc.b 00,23
SERVER_SOURCEPORT:
      dc.b $0c,$64

      
Read_Mask: dc.b $07,$ff      
Read_Base:   dc.b $00,$00
Read_Offset: dc.b $00,$00
Read_Count: dc.b $00,$00      
Read_Count2: dc.b $00,$00      
Read_Offset2: dc.b $00,$00      
Read_Masked_Offset dc.b $00,$00


hostcfg.asm:
Code:
   ;Host configuration data for wiznet

CONFIG_WIZNET_HOST:
      lda #$03 ;set indirect + autoincrement
      sta WIZNET_BASE

      lda #$00
      sta WIZNET_ADDR_HI
      lda #$01
      sta WIZNET_ADDR_LO
      
      ldx #$00
CONFIG_LOOP1:      
      lda CONFIG_DATA1,x
      sta WIZNET_DATA
      inx
      cpx #$12
      bne CONFIG_LOOP1
      rts

CONFIG_DATA1:
      dc.b 192,168,64,1               ;Gateway
      dc.b 255,255,255,0              ;Netmask
      dc.b $06,$06,$06,$06,$06,$06    ;MAC Address
      dc.b 192,168,64,6              ;IP Address


open.asm:
Code:
;opens the host/port found at label
;"SERVER_ADDR", "SERVER_PORT", from "SERVER_SOURCEPORT"
WIZNET_CONNECT_TO_SERVER:
      ;set source port
      WIZREG_WRITE WIZNET_S0_PORT0, SERVER_SOURCEPORT
      WIZREG_WRITE WIZNET_S0_PORT1, SERVER_SOURCEPORT+1
      
      ;set open mode (tcp)
      WIZREG_WRITE WIZNET_S0_BASE,#WIZNET_MODE_TCP

      ;Open our side
      WIZREG_WRITE WIZNET_S0_CR,#WIZNET_CMD_OPEN

      ;set dest address
      lda #$03 ;set indirect + autoincrement
      sta WIZNET_BASE

      lda #>WIZNET_S0_DIPR0
      sta WIZNET_ADDR_HI
      
      lda #<WIZNET_S0_DIPR0
      sta WIZNET_ADDR_LO
      
      lda SERVER_ADDRESS
      sta WIZNET_DATA
      lda SERVER_ADDRESS+1
      sta WIZNET_DATA
      lda SERVER_ADDRESS+1
      sta WIZNET_DATA
      lda SERVER_ADDRESS+1
      sta WIZNET_DATA
      ;set dest port
      lda SERVER_PORT
      sta WIZNET_DATA
      lda SERVER_PORT+1
      sta WIZNET_DATA
      
      ;Connect
      WIZREG_WRITE WIZNET_S0_CR,#WIZNET_CMD_CONNECT
      rts


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PostPosted: Sat Nov 13, 2010 2:14 pm 
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Joined: Mon Mar 23, 2009 12:11 pm
Posts: 140
Location: Katoomba, Australia
I still haven't bought a wiznet board yet, because I'm skeptical of my ability to put a working board together, so today I rummaged through the cupboard and found a tub full of ICs and an 8-bit baby. Bit it turns out I had already put some stuff on the 8BB, when I was playing with Apple ][s, so I ended up cutting off the C64 connector, and hooking it up to a breadboard.

Then I dug through my ICs and found a 74HC573 (octal latch), a MC4001 (quad NOR) and a 74LS138 (3 to 8 line decoder). I hooked it all up, with the '138 decoding /IO2 + A7:A4 (synched to PHI2) and the 4001 NORing one of the '138 outputs plus R/W with the result fed in to the Latch Enable of the '573.

The I hooked up an LED to one of the '573 outputs. And after all of that, I could turn the LED on & off via POKE. All of which meant my homebrew breadboard cart seems to work OK, and my understanding of how to interface to the C64 seems sufficient, so I guess the next step is to get the wiznet board.

http://www.flickr.com/photos/jonnosan/5171714478/


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PostPosted: Sat Nov 13, 2010 7:41 pm 
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Joined: Sun Feb 10, 2008 6:55 am
Posts: 75
jonnosan wrote:
The I hooked up an LED to one of the '573 outputs. And after all of that, I could turn the LED on & off via POKE. All of which meant my homebrew breadboard cart seems to work OK, and my understanding of how to interface to the C64 seems sufficient, so I guess the next step is to get the wiznet board.

http://www.flickr.com/photos/jonnosan/5171714478/


The 138 is a nice idea, I have used it for the same things in my 6551 cart. You can get away with just the '138 for testing the WizNET

Feed:

R!W into A0
PHI2 into E3
IO/2 into !E2
A7 to !E2
A5,A6 = A1,A2

Then, !Y0 = !WR, !Y1 = !RD, and the unit will respond to addresses df00 to df1f, if my math is correct.

Jim


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PostPosted: Sat Nov 13, 2010 11:46 pm 
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Joined: Mon Mar 23, 2009 12:11 pm
Posts: 140
Location: Katoomba, Australia
brain wrote:
Then, !Y0 = !WR, !Y1 = !RD, and the unit will respond to addresses df00 to df1f, if my math is correct.
Jim


I assume in that case that /CS on the WS5100 should be permanently grounded?

Also, if I want to interface /IRQ , is all I need to add a 7406?, Which would be connected something like:

[W5100] /INT -> [7406] 1A : 1Y-> [7406] 2A : 2Y ->[C64] /IRQ

(i.e. output 1Y is connected to input 2A so that what comes out of 2Y is the same logic level as input 1A, but because the 7406 is open collector, the resulting signal is suitable for connection to the C64 /IRQ bus)


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PostPosted: Sun Nov 14, 2010 6:47 am 
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Joined: Sun Feb 10, 2008 6:55 am
Posts: 75
jonnosan wrote:
brain wrote:
Then, !Y0 = !WR, !Y1 = !RD, and the unit will respond to addresses df00 to df1f, if my math is correct.
Jim


I assume in that case that /CS on the WS5100 should be permanently grounded?

Also, if I want to interface /IRQ , is all I need to add a 7406?, Which would be connected something like:

[W5100] /INT -> [7406] 1A : 1Y-> [7406] 2A : 2Y ->[C64] /IRQ

(i.e. output 1Y is connected to input 2A so that what comes out of 2Y is the same logic level as input 1A, but because the 7406 is open collector, the resulting signal is suitable for connection to the C64 /IRQ bus)

/CS grounded
And yes, your 7406 writeup is correct.

Jim


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PostPosted: Tue Nov 16, 2010 2:27 pm 
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Joined: Mon Dec 04, 2006 2:41 pm
Posts: 23
Location: Milwaukee, WI, USA
I've made some progress on a proof-of-concept driver; there's some code on my site: http://lyonlabs.org/wiznet.tgz. It's implemented as a single binary with a jump table. So far, it only does poll and read (I've connected to a server program on a PC and received data), but it's moving fast. It uses the inlining technique Six was talking about to reduce code size. Note that it still contains debug code that uses $5000 and $6000 as a scratchpad, and calls CHROUT directly in the driver when receiving data. In normal use, you'd want to have the caller specify the address of a buffer to copy into, yes?

I'm using cc65 so that a single code base can produce drivers for various environments, which I think is hugely important. For example, the directive -D LOADADDR in the Power C makefile will emit the standard two-byte load address at the start of the code (or not, for e.g. a GEOS driver). You can also control the area of zero page used (see the .cfg files). Eventually, it should also have configurable interrupt routines and timers for different environments.

_________________
"...and all watched over by machines of loving grace."


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PostPosted: Wed Nov 24, 2010 4:08 am 
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Joined: Mon Mar 23, 2009 12:11 pm
Posts: 140
Location: Katoomba, Australia
My WIZ811MJ arrived last night.

Unfortunately I then discovered something which should have been apparent had I read the datasheet more closely, namely the WIZ811MJ has *two* rows of pins on each side, and as such is not suitable for use in a breadboard.

So I will need a real prototyping board. I've just placed an order for some more 8 bit babies, but will take a while for delivery to .au from .eu


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PostPosted: Tue Dec 07, 2010 12:59 pm 
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Joined: Mon Mar 23, 2009 12:11 pm
Posts: 140
Location: Katoomba, Australia
So here's a 1000 words of my own :-)

http://www.flickr.com/photos/jonnosan/5240333323/

I haven't tried any actual code yet, apart from rudimentary peeks & pokes to test I can actually talk to the wiznet chip.


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PostPosted: Tue Dec 07, 2010 2:41 pm 
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Joined: Mon Dec 04, 2006 2:41 pm
Posts: 23
Location: Milwaukee, WI, USA
Here's my latest attempt:

http://lyonlabs.org/wiznet-20101207.tgz

Since Six is looking at DNS and DHCP, I'm starting to think about interrupt handling.

How do you think that should be done? You could register a callback, but you wouldn't want the callback to run during interrupt time, yes? (What if you wanted to do e.g. disk access in response to a data ready event?) If you just set a flag, you'd still end up with polling (although that would work well for GEOS using a process).

The situation is complicated if you want a driver that can be used in different environments. For example, how would you invoke a callback to a Power C or other compiled program? The interrupt hook itself wouldn't be that hard.

_________________
"...and all watched over by machines of loving grace."


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